REIE=0, CA1IE=0, CB0IE=0, CX1IE=0, CA0IE=0, CB1IE=0, CMPIE=0, CX0IE=0, RIE=0
Interrupt Enable Register
CMPIE | Compare Interrupt Enables 0 (0): The corresponding STS[CMPF] bit will not cause an interrupt request. 1 (1): The corresponding STS[CMPF] bit will cause an interrupt request. |
CX0IE | Capture X 0 Interrupt Enable 0 (0): Interrupt request disabled for STS[CFX0]. 1 (1): Interrupt request enabled for STS[CFX0]. |
CX1IE | Capture X 1 Interrupt Enable 0 (0): Interrupt request disabled for STS[CFX1]. 1 (1): Interrupt request enabled for STS[CFX1]. |
CB0IE | Capture B 0 Interrupt Enable 0 (0): Interrupt request disabled for STS[CFB0]. 1 (1): Interrupt request enabled for STS[CFB0]. |
CB1IE | Capture B 1 Interrupt Enable 0 (0): Interrupt request disabled for STS[CFB1]. 1 (1): Interrupt request enabled for STS[CFB1]. |
CA0IE | Capture A 0 Interrupt Enable 0 (0): Interrupt request disabled for STS[CFA0]. 1 (1): Interrupt request enabled for STS[CFA0]. |
CA1IE | Capture A 1 Interrupt Enable 0 (0): Interrupt request disabled for STS[CFA1]. 1 (1): Interrupt request enabled for STS[CFA1]. |
RIE | Reload Interrupt Enable 0 (0): STS[RF] CPU interrupt requests disabled 1 (1): STS[RF] CPU interrupt requests enabled |
REIE | Reload Error Interrupt Enable 0 (0): STS[REF] CPU interrupt requests disabled 1 (1): STS[REF] CPU interrupt requests enabled |